|Due By (Pacific Time)||12/15/2016 07:00 pm|
I have a project and I would really appreciate it if you can help me with it ASAP. I have the template file attached.
I need you to fill out the "hardware lab" file with diagrams, you can do it on a separate paper and then scan the answers.
There is a game called Screwball. Every time a ball is put in play, either player 1 scores a point or player 2 scores a point. A winner is declared when one player is ahead by 2 points. Starting with a score of 0:0 for P1 vs. P2, a game might progress as follows:
0:1 1:1 2:1 3:1 (P1 Wins!)
The Application: The Win Announcer
Your task is to develop a synchronous sequential machine that uses information about which player scores a point at each stage of a game to indicate BOTH when a player wins and which player wins. Your design should include one reset input to initialize your WIN ANNOUNCER (this may be a synchronous or asynchronous input as you desire). The outputs from your design should indicate BOTH when a win has occurred and which player is the winner.
All information to complete this design may not be specified. Write down and report any assumptions that you make in your design.
Be sure to use debounced “logic switches” for driving the clock input to the flip-flops.
You are to design two CONCEPTUALLY different finite-state synchronous machines. A design which differs only by the type of flip flop used (e.g., J-K vs. D) or number of states is not considered conceptually different.
First, you will need to implement both designs using Logisim and demonstrate to the CSE/EEE 120 simulation TA’s in GWC 185 that both designs work correctly by the software due date (See Table 1 below).
You may demo this by either 1) opening your file using the computer reserved by the TA on duty or 2) asking the TA to test your circuit on your laptop. You will need to bring with you a printout of your report template into which you’ve cut/pasted your Logisim circuits. It makes most sense to complete the lab template and print it before you go and demonstrate the designs to the TA. You must have your design simulation working before asking the TA to test it because you will be given only one chance to prove that it works. You must also be able to defend your design; the TA’s will be asking questions to make sure that your design is your own original work. Upon completion of your simulation demonstration, the TA’s will sign and apply a grade to your report template. You also need to include these simulations into your lab report template.
Second, you will need to implement ONE design using the TTL parts you used in earlier lab work and demonstrate to only a CSE/EEE 120 hardware TA that your circuit works correctly. You must complete this demo by the due date (See Table 1 below). After reviewing the simulation TA’s signature on your Logisim schematic printout, the hardware TA’s will test your design and stamp the design pages of your completed report template. You must be able to explain why your circuit responds the way it does to a given input data stream. You must have your report template completed and bring it with you to your in-lab hardware demonstration. Your completed report template will be collected by the hardware TA at the conclusion of your demonstration.
out of 1971 reviews
out of 766 reviews
out of 1164 reviews
out of 721 reviews
out of 1600 reviews
out of 770 reviews
out of 766 reviews
out of 680 reviews